Product Summary
The 74LVC573ADB is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. This feature of 74LVC573ADB allows the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC573ADB is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-State outputs for bus-oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all internal latches.
Parametrics
74LVC573ADB absolute maximum ratings: (1)DC supply voltage: –0.5 to +6.5 V; (2)DC input diode current: –50 mA at VI 0; (3)DC input voltage: –0.5 to +6.5 V; (4)IOK DC output diode current: ±50 mA at VO>VCC or VO < 0; (5)DC output voltage; output HIGH or LOW state: –0.5 to VCC +0.5 V; (6)DC output voltage; output 3-State: –0.5 to 6.5; (7)DC output source or sink current: ±50 mA at VO = 0 to VCC; (8)DC VCC or GND current: ±100 mA; (9)Storage temperature range: –65 to +150 ℃; (10)Power dissipation per package: plastic mini-pack (SO): 500 mW, plastic shrink mini-pack (SSOP and TSSOP): 500 mW.
Features
74LVC573ADB features: (1)5-volt tolerant inputs/outputs, for interfacing with 5-volt logic; (2)Supply voltage range of 2.7V to 3.6V; (3)Complies with JEDEC standard no. 8-1A; (4)Inputs accept voltages up to 5.5V; (5)CMOS low power consumption; (6)Direct interface with TTL levels; (7)High impedance when VCC = 0V; (8)Flow-through pin-out architecturey.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||
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74LVC573ADB |
NXP Semiconductors |
Latches 3.3V OCTAL D TRANS LATCH 3-S |
Data Sheet |
Negotiable |
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74LVC573ADB,112 |
NXP Semiconductors |
Latches 3.3V OCTAL D TRANS |
Data Sheet |
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74LVC573ADB,118 |
NXP Semiconductors |
Latches 3.3V OCTAL D TRANS |
Data Sheet |
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74LVC573ADB-T |
NXP Semiconductors |
Latches 3.3V OCTAL D TRANS LATCH 3-S |
Data Sheet |
Negotiable |
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